Address translation buffer control system

Details Address translation buffer control system Address translation buffer control system

G - Physics

06

F

354/239

G06F 12/14 (2006.01) G06F 12/10 (2006.01)

Patent

CA 1195010

ABSTRACT OF THE DISCLOSURE This invention relates to an effective control system for address translation buffer or table look-aside buffer in a computer system utilizing a virtual storage system. In the address translation buffer, effective addresses, physical addresses corresponding thereto and storage protection keys corresponding to said physical addresses are stored, and the address translation and protection key check are performed simultaneously. If the desired address translation pairs could not be found by indexing the address translation buffer, a physical address is obtained by the address translation system using page table etc. and such physical address is newly stored in the address translation buffer. In such a system, an access instruction which does not require the protection key check is detected. In such a case, if a physical address has been obtained by said address trans- lation system because there is no desired address translation pair in said address translation buffer, such physical address is directly used without being stored in the address translation buffer.

431521

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