Adjustable ratio divider

H - Electricity – 03 – K

Patent

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H03K 23/48 (2006.01) H03K 23/66 (2006.01) H03L 7/18 (2006.01) H03L 7/183 (2006.01) H03L 7/197 (2006.01)

Patent

CA 1208704

ABSTRACT A phase locked loop circuit having a pulse swallowing gate for receiving a pulse train from a controllable oscillator, wherein a number of pulses are removed by the gate in dependence upon a control signal generated by a programmable frequency divider receiving a clock signal. The programmable frequency divider also generates a reference signal which is fed to a phase comparator, and which generates a second control signal dependent upon the phase difference between the reference signal and the pulse train which has been passed through the pulse shallowing gate. The second control signal may then be fed to the controllable oscillator to control the frequency of the pulse train. Such control is useful for instance in frequency synthesizers.

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