Adjustable time delay circuit

Details Adjustable time delay circuit Adjustable time delay circuit

H - Electricity

03

K

328/188

H03K 17/28 (2006.01) H03K 5/13 (2006.01) H03K 5/00 (2006.01)

Patent

CA 1209650

ABSTRACT OF THE DISCLOSURE An adjustable time delay circuit 10, 50 includes a tine delay line 12 including a plurality of series con- nected time delay units 18a-p. During adjustment, sampled signals along the delay line 12 are compared with a refer- ence signal by NOR-gates 22e-m. Upon a comparison being attained the output of the corresponding NOR-gate 22e-m sets a selected flip-flop 30e-m which in turn routes the signal at a selected delay line ta? 38e-m through a NOR-gate 34e-m to an output NAND-gate 40. The ta? 38e-m selected compensates for component propagation characteristics thus maintaining a predetermined time delay through the time delay circuit 10.

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