G - Physics – 11 – B
Patent
G - Physics
11
B
G11B 20/10 (2006.01) G11B 5/09 (2006.01) G11B 27/36 (2006.01)
Patent
CA 2052790
ADJUSTABLE WRITE EQUALIZATION FOR TAPE DRIVES ABSTRACT A write equalization circuit that including a data encoder for producing a binary data signal wherein a 1 is represented by a transition at the start of a bit interval and a 0 is represented by no transition at the start of a bit interval, an equalization timing generator for generat- ing a start signal indicative of the initial edges of equalization pulses for predetermined 0's in the binary data signal, and a multiple stage delay delay circuit having logic gates implemented in an integrated circuit and responsive to the start signal and a control word for providing equalization pulses of a substantially constant width, wherein the number of stages employed for delay is determined by the control word. Logic circuitry implement- ed in the same integrated circuit as the multiple stage delay circuit detects changes in the propagation delay characteristics of the logic gates of the multiple stage delay circuit, and a processor responsive to the logic circuitry adjusts the control word so as to maintain the width of the equalization pulses substantially constant. Also disclosed is a method for adjusting write equalization pulses in a tape drive to achieve a desired suppression in the read signal.
Buchan William A.
Lin Yinyi
Unruh Gregory A.
Conner Peripherals Inc.
Sim & Mcburney
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