Agc delay on an integrated circuit

H - Electricity – 03 – G

Patent

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325/101

H03G 3/20 (2006.01) H03G 1/00 (2006.01) H04B 1/16 (2006.01)

Patent

CA 1323659

AGC DELAY ON AN INTEGRATED CIRCUIT ABSTRACT OF THE DISCLOSURE Circuitry is disclosed for staggering the onset of gain reduction in a series of cascaded gain stages as a function of received signal strength. The staggering is effected by controlling the area ratio between corresponding components in two or more AGC control circuits whose topologies are otherwise identical. The technique is particularly well suited for use in radio receivers fabricated in integrated circuit form.

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