An improved technique for jointly performing bit...

Details An improved technique for jointly performing bit... An improved technique for jointly performing bit...

H - Electricity

04

L

H04L 7/04 (2006.01) H04L 1/00 (2006.01)

Patent

CA 2247534

An improved technique for simultaneously performing bit synchronization (100) and error detection (150) of received digital data bursts in a time division multiplexed/time division multiple access (TDM/TDMA) system, such as that used in conjunction with low power portable digital telephony. With the improved technique both bit synchronization (100) and error detection (150) are performed simultaneously to thereby reduce latency in the transceiver. Since round-trip delay is reduced, echo suppression techniques may not be needed.

L'invention porte sur une technique améliorée permettant d'effectuer simultanément la synchronisation (100) des bits et la détection des erreurs (150) sur des paquets de données numériques reçus dans un système MRT/AMRT tel que celui qu'on utilise en association avec les téléphones numériques mobiles de faible puissance. Avec cette technique améliorée permettant d'effectuer simultanément la synchronisation des bits et la détection des erreurs, on réduit le délai de latence dans l'émetteur récepteur. Comme le retard du temps AR de propagation est réduit, il n'est plus nécessaire d'utiliser de techniques de suppression d'écho.

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