G - Physics – 06 – F
Patent
G - Physics
06
F
354/237
G06F 13/14 (2006.01)
Patent
CA 2036372
Hardware and software improvements in workstations which utilize a cache for increasing the throughput of Direct Memory Access (DMA) I/O on an operating system supporting multiple concurrent I/O operations. In a workstation or server having an operating system supporting multiple concurrent I/O operations system, performance may be improved significantly by including a write back cache for I/O as one of the system elements. Such write back cache supports external devices with at least two types of device interfaces: a standard system bus interface and a network control interface and significantly enhances the performance of DVMA (or DMA) data transfers through a unique combination of hardware and software support, which includes a physical cache for temporarily buffering I/O data to and from external devices, and all associated controls, an I/O cache tag array, data paths and diagnostic and programming support necessary to make an I/O cache functional.
Labuda David
Van Loo William C.
Watkins John
Riches Mckenzie & Herbert Llp
Sun Microsystems Inc.
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