H - Electricity – 03 – M
Patent
H - Electricity
03
M
354/84
H03M 1/44 (2006.01)
Patent
CA 1338514
An A-D converter for providing the general successive rectification algorithm Vout =2 ¦ Vin ¦ - Vref is disclosed. One stage of a synchronous parallel converter generally comprises a comparator, and an op amp with Vin as an input to its inverting input, the noninverting input connected to ground, and the output being Vout, with a first capacitor bridging the inputs of the op amp, and a second capacitor of half the capacitance of the first capacitor feeding back from the output of the op amp to its noninverting input. The location and capacitance values of the first and second capacitors perform the amplification function. Switches between the first capacitor and the op amp provide rectification, while a third capacitor between Vref and the inverting input of the op amp provides the function of subtracting Vref. Stages are cascaded such that Vout of one stage is the Vin of the next stage . Each stage's Vin is compared to ground to provide a bit of information. A shift register having a storage capacity of m bits is associated with each stage where m is the number of the particular stage.
528134
General Datacomm Inc.
Osler Hoskin & Harcourt Llp
Robinson Jeffrey I.
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