Analog storage for a cmos array

H - Electricity – 04 – N

Patent

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H04N 3/15 (2006.01) H04N 5/235 (2006.01) H04N 5/30 (2006.01) H04N 5/335 (2006.01)

Patent

CA 2331002

The image sensor comprises an analog memory array integrated on a die with a CMOS sensor array and coupled to the sensor array for receiving light intensity signals from the sensor array. The sensor array may comprise light sensitive pixels arranged in rows and columns equal in number or greater than the number of memory cells in the memory array which are also arranged in rows and columns. The memory cells may be grouped into one or more distinct memory arrays. The image sensor operates in a rolling shutter mode which closely approximates electronic frame capture since the transfer process can be made sufficiently fast. This CMOS image sensor is particularly advantageous since it can be produced without requiring a special manufacturing process and still maintains a high performance level. Certain features of the image sensor along with the optical isolation of the memory array result in longer hold times in the memory cells by reducing the effects of light piping, optically enhanced sub-threshold current, and photo charge in the substrate. Structural variations in the sensor and the memory arrays may be compensated by double sampling the data from the sensor array.

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