And-type one time programmable memory cell

Details And-type one time programmable memory cell And-type one time programmable memory cell

G - Physics

11

C

G11C 17/16 (2006.01) G11C 17/08 (2006.01) G11C 17/18 (2006.01)

Patent

CA 2682092

An AND-type anti-fuse memory cell, and a memory array consisting of AND-type anti-fuse memory cells. Chains of AND type anti-fuse cells are connected in series with each other, and with a bitline contact, in order to minimize the area occupied by the memory array. Each AND type anti-fuse cell includes an access transistor serially connectable to the bitline or the access transistors of other AND type anti-fuse cells, and an anti-fuse device. The channel region of the access transistor is connected to the channel region of the anti- fuse device, and both channel regions are covered by the same wordline. The wordline is driven to a programming voltage level for programming the anti-fuse device, or to a read voltage level for reading the anti-fuse device.

L'invention concerne une cellule de mémoire anti-fusible de type ET, ainsi qu'une mémoire se composant de cellules de mémoire anti-fusibles de type ET. Des chaînes de cellules anti-fusibles de type et sont reliées en séries les unes avec les autres. Chaque cellule anti-fusible de type ET comprend un transistor d'accès branchable en série à la ligne de bits ou aux transistors d'accès d'autres cellules anti-fusibles de type et, ainsi qu'un dispositif anti-fusible. La région de canal du transistor d'accès est reliée à la région de canal du dispositif anti-fusible. Les deux régions de canal sont couvertes par la même ligne de mot. La ligne de mot est poussée au niveau de tension de programmation pour programmer le dispositif anti-fusible, ou à un niveau de tension de lecture pour lire le dispositif anti-fusible.

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