G - Physics – 06 – F
Patent
G - Physics
06
F
354/241
G06F 12/00 (2006.01) G06F 13/16 (2006.01) G11C 7/10 (2006.01) G11C 8/00 (2006.01)
Patent
CA 1319201
BC9-88-002 ABSTRACT OF THE DISCLOSURE A computer system is provided in which memory access time is substantially reduced. After row address strobe (RAS) and column address strobe (CAS) signals are used to select a particular address in a memory during a first memory cycle, the addressed data is latched for later transfer to a data bus. A CAS precharge of the memory is then conducted after such latching and prior to the end of the first memory cycle before the commencement of the second memory cycle.
598606
Bland Patrick M.
Dean Mark E.
International Business Machines Corporation
Saunders Raymond H.
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