Apparatus and method for capacitor coupled complementary...

H - Electricity – 03 – K

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H03K 17/10 (2006.01) H03K 5/02 (2006.01) H03K 17/687 (2006.01) H03K 19/017 (2006.01)

Patent

CA 1288830

ABSTRACT OF THE INVENTION A semiconductor buffer circuit and buffering method for driving capacitive loads that enhances the current sinking and sourcing drive characteristics at times when the input signal is changing. Two transistors are used, a source follower and a cur- rent source pull-down, with an input signal applied to the con- trol input of the source follower transistor. The complement of the input signal is capacitively coupled to the control input of the current source pull-down transistor. As a result, changes in the input voltage increase or decrease the conductivity of the current source pull-down transistor, thereby allowing the capaci- tive load to be charged and discharged more efficiently.

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