G - Physics – 06 – F
Patent
G - Physics
06
F
354/231
G06F 1/04 (2006.01) G06F 13/42 (2006.01)
Patent
CA 2023998
ABSTRACT OF DISCLOSURE An interface between a central processing unit (CPU) and a peripheral device is provided which ensures compatibility between existing software for the peripheral device and a CPU of any speed. The interface waveshapes read or write strobe signals in a transfer cycle between the peripheral device and the CPU in order to ensure timing parameters of the peripheral device are not violated by fast CPUs. If the waveshaping causes a change in the timing between first and second consecutive read or write strobe signals, the interface provides a wait signal to the CPU for the purpose of instructing it to extend the transfer cycle of the second strobe signal. In the illustrated embodiment, an interface according to the invention is part of a video interface connecting a microprocessor unit (MPU) and a video digital-to-analog converter (video DAC). Writing or reading color data to or from the video DAC occurs by way of the interface of the invention. The MPU is slowed while it writes or reads color data only when it is required to prevent violation of the timing parameters of the video DAC. In this regard, slower MPUs are not penalized by the invention since wait states are inserted into a transfer cycle only when it is necessary to re-space consecutive read or write strobe signals to prevent the violation of timing parameters.
Lewis Thomas F.
Thompson Stephen P.
International Business Machines Corporation
Kerr Alexander
LandOfFree
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