Apparatus and method for increasing the efficiency of random...

G - Physics – 11 – C

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354/223, 354/241

G11C 29/00 (2006.01) G06F 11/10 (2006.01) G06F 11/14 (2006.01) G11C 7/10 (2006.01) G11C 7/22 (2006.01)

Patent

CA 1070850

Abstract Apparatus and method are described wherein the average access time utilized for recovering stored data in a random access storage system is reduced. An access cycle is begun with the pre- determined typical data bit delivery time known and with the know- ledge of the worst case data bit delivery time. An output buffer is connected to a random access storage for receiving the data bits of an output message from the storage. The output buffer is gated to receive the data from the random access storage; the gate signal enables the output buffer to receive data bits over a pre- determined time interval. The output buffer is connected to a data transmission means such as a bus, and is gated by a second signal to place the stored information on the bus. The second signal, the message gate signal, is timed to place the information stored in the output buffer on the bus during the period beginning with the typical data bit delivery time and ending after the worst case data bit delivery time. Thus, the data bits may be received from the random access storage and subsequently or immediately transmitted by the output buffer depending on the time of arrival of the data bit at the output buffer. Parity checking means check the parity of the message being transmitted from the random access storage to the output buffer; at the end of the time allowed for the worst case data bit delivery time the condition of the parity check means is ascertained, and if an incorrect parity condition exists an error/retry signal is generated to begin a retry cycle to again transmit the contents of the output buffer to the b?s.

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