Apparatus and method for providing optimal adaptive forward...

H - Electricity – 03 – M

Patent

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H03M 13/35 (2006.01) H04L 1/22 (2006.01) H04L 12/28 (2006.01)

Patent

CA 2430144

An adaptive and dynamic forward error correction scheme for a communication channel is disclosed. The method and apparatus calculates (206) the actual bit error rate for comparison (207) with a target bit error rate. When a channel is performing better than required by the performance specification, the forward error correction power can be reduced (214) to provide greater throughput. If the calculated actual bit error rate is greater than the target bit error rate, then the forward error correction power is increased (219) in an attempt to lower the calculated bit error rate. A feedback loop is employed to continually calculate received bit error rates as the forward error correction power is increased or decreased.

L'invention concerne un plan de correction adaptative et dynamique d'erreurs sans voie de retour pour une voie de communication. Ce procédé et cet appareil calculent le taux réel d'erreurs sur les bits pour le comparer à un taux cible d'erreurs sur les bits. Lorsqu'une voie fonctionne mieux que ne l'exigent les spécifications de rendement, la puissance de correction d'erreurs sans voie de retour peut être réduite afin d'augmenter le débit. Si le taux réel calculé d'erreurs sur les bits est supérieur au taux cible d'erreurs sur les bits, la puissance de correction d'erreurs sans voie de retour est augmentée afin de tenter d'abaisser le taux calculé d'erreurs sur les bits. Une boucle de réaction est utilisée afin de calculer de manière continue les taux révisés d'erreurs sur les bits lorsque la puissance de correction d'erreurs sans voie de retour est augmentée ou diminuée.

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