Apparatus and method for translating ecl signals to cmos...

H - Electricity – 03 – K

Patent

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H03K 19/0175 (2006.01) H03K 3/356 (2006.01)

Patent

CA 2051928

ABSTRACT The present invention provides a ECL to CMOS level translation circuit which uses a dynamic, internally generated reference voltage to translate ECL level signals into CMOS level signals. The translator includes an input translation circuit which uses emitter-follower bipolar transistors for receiving and interpreting the ECL level signals and to generate the dynamic, internally generated reference potential, and an output circuit for outputting the CMOS signals.

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