Apparatus and method for versatile digital communication

H - Electricity – 03 – L

Patent

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Details

H03L 7/08 (2006.01) H03L 7/093 (2006.01) H03L 7/10 (2006.01) H03L 7/183 (2006.01) H04L 7/027 (2006.01) H04L 7/033 (2006.01)

Patent

CA 2289321

A simple phase locked loop (PLL) operates over a broad continuous range of frequencies, a range much larger than one octave but requires only an octave VCO. The Q of the PLL is controlled to within a factor of two at every frequency on the broad continuous range. The PLL enables the invention of a clock recovery circuit that operates at any bit-rate on a broad, continuous range of bit-rates. The bit-rate independent clock recovered by the PLL has equivalent fitter performance at all bit-rates. The PLL may be used to provide 3R transponder/regenerators with read/write access to overhead data, eye quality assessment, monitoring/identification of the bit-rate of the signal, and with bit-rate independent digital multiplexing and demultiplexing functions. Such a 3R transponder/regenerator may also enable addition of overhead data to the digital signal, independent of the format or bit-rate of the digital signal. Bit-rate independent digital multiplexing and demultiplexing enable the interconnection of electronics in the 3R transponder/regenerator, or provision of digital signals to other functional blocks, at the lower demultiplexed bit- rate.

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