Apparatus for attenuating and/or amplifying a binary-...

H - Electricity – 03 – H

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H03H 17/00 (2006.01) H03G 3/00 (2006.01)

Patent

CA 1184304

16 Abstract Digital signal values are decreased or increased by a predetermined proportion in two steps. A coarse decrease or increase in steps of 6 dB is first effected by shifting the digital word to be modified in a shift regis- ter (R), after which a fine increase or decrease is realized by adding to or subtracting from the result the result which is once more decreased by shifting it through a number of bit positions. the second step may be repeated a number of times, each time using the result of the preceding such step as the word operated upon, to eventually give the required answer. The addition or subtraction is carried out in an adding and/or subtracting device (AD), the additional shift being achieved by means of the wiring between the output (RO1...RO16) of the sift register and the two inputs (AI101...AI116 and AI201...AI216) of the device, and the result replacing the word previously in the shift register, so that no further signal-processing registers are required.

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