G - Physics – 06 – F
Patent
G - Physics
06
F
354/232
G06F 3/00 (2006.01) G06F 15/16 (2006.01)
Patent
CA 1145854
ABSTRACT Under the I/O protocol required by conventional computer architectures, peripheral devices communicate with each other via the CPU of a host computer. That requirement necessitates two separate data transfers and cuts the data transfer rate by one-half. This invention discloses a data processing system having an architecture that will allow high-speed direct device-to-device data transfers independently of a computer memory. The system consists of a host computer interconnected with a remote signal processing subsystem. A Direct Device Access Bus and a plurality of data processing devices are provided. A controller associated with a Signal Processing Subsystem supervisor, selectively interconnects desired ones of a set of data processing devices via the Direct Device Access Bus to provide direct communication between -the selected devices within a set. Several sets of devices can be serviced concurrently by the technique of dynamic time slot allocation. mg/
360075
Cooper Patrick R.
Golden Donald P.
Harlan John A.
Higgins Ronald B.
Perry Paul M.
Litton Resources Systems Inc.
Macrae & Co.
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