Arbitration of bus access in digital computers

Details Arbitration of bus access in digital computers Arbitration of bus access in digital computers

G - Physics

06

F

354/234

G06F 13/36 (2006.01) G06F 13/18 (2006.01) G06F 13/20 (2006.01) G06F 13/374 (2006.01)

Patent

CA 2009055

ARBITRATION OF BUS ACCESS IN DIGITAL COMPUTERS ABSTRACT A bus arbitration protocol and accompanying bus arbitration logic for multiple-processor computer systems in which each processing module has a local cache. Several bus arbitration policies are enforced on contending devices which effectively introduce delay states into the arbitration behavior exhibited by each device. The bus arbitration protocol employs a distributed method of arbitration control involving an essentially fixed prioritization of arbitrating devices.

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