H - Electricity – 04 – Q
Patent
H - Electricity
04
Q
H04Q 3/42 (2006.01) G06F 11/16 (2006.01) H04L 12/56 (2006.01) H04Q 11/04 (2006.01)
Patent
CA 2068976
- 8 - ARRANGEMENT FOR CONTROLLING SHARED-BUFFER-MEMORY OVERFLOW IN A MULTI-PRIORITY ENVIRONMENT Abstract A shared-buffer-memory-based ATM switching module (FIG. 1) used with ATM cells having a multiplicity of priorities has a plurality of queues (100) for each output port (O-N), one for each cell priority, and handles buffer overflow in a manner fair to all output ports. It initially allows output-port queues (100) tocompletely consume the buffer memory (12). Thereafter, when an additional incoming cell is received for which there is no room in the buffer memory, the lengths of all of the queues of each output port are individually summed (402) and compared to determine which port has the greatest number of buffered cells (406). A buffered ATM cell is discarded (410) from the lowest-priority non-empty queue of that port (408). The incoming cell is then stored in the memory space vacated by the discarded cell (412).
Pashan Mark Allen
Spanke Ronald Anthony
American Telephone And Telegraph Company
Kirby Eades Gale Baker
LandOfFree
Arrangement for controlling shared-buffer-memory overflow in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Arrangement for controlling shared-buffer-memory overflow in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Arrangement for controlling shared-buffer-memory overflow in... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1571670