Arrangement for monitoring the bit rate in atm networks

H - Electricity – 04 – L

Patent

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H04L 1/00 (2006.01) H04L 1/24 (2006.01) H04L 12/56 (2006.01)

Patent

CA 2076802

ABSTRACT OF THE DISCLOSURE For a dual leaky bucket ATM bit rate monitoring wherein the peak bit rate is monitored in a first leaky bucket unit and the maximum cell plurality of a full rate burst is declared, the duration of peak rate bursts is monitored in a second leaky bucket unit with a first counter respectively reset to 0 when the counter reading returns below a defined value. The average bit rate is monitored with a second counter having a lower response threshold, and which is incremented only with a smoothed cell rate given higher bit rates.

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