Arrangement for monitoring the bit rate in atm networks

H - Electricity – 04 – L

Patent

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H04L 1/00 (2006.01) H04L 1/24 (2006.01) H04L 12/56 (2006.01)

Patent

CA 2076803

ABSTRACT OF THE DISCLOSURE For dual leaky bucket ATM bit rate monitoring, a peak bit rate is monitored in a first leaky bucket unit and a maximum cell plurality of a full rate burst is delined. A duration of peak rate bursts is monitored in a second leaky bucket unit with a first counter respectively reset lo û when the counter reading returns below a delined value. An average bit rate is monitored with a further counter having a lower response value that is incremented with a cell rate which is smoothed dependent on a degree of filling in an additional cell counter.

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