Arrangement for providing data signals for a data display...

G - Physics – 09 – G

Patent

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375/15

G09G 1/00 (2006.01) G09G 5/393 (2006.01)

Patent

CA 1234436

ABSTRACT OF THE DISCLOSURE The present invention includes a microprocessor which acts to generate groups of its signals from its read only memory (ROM), thereby forming character representations of groups of coded signals, such as ASCII coded signals, coming from a main data processing device. The groups of bit signals are temporarily stored in a buffer which at a subsequent time transmits, in parallel, groups of said bit signals to a bit map memory through logic circuitry. The group, or block, transfer of these bit signals in parallel occurs during horizontal or vertical blank periods. The parallel transfer during the blank periods provides part of the basis for acceleration of the transfer of data to a display device as compared with the prior art. In addition, the microprocessor provides address information signals to a graphic display controller, which in turn provides starting addresses for the location of the bit signals in addition, a bit map memory device is employed to provide pixel information to a CRT display device to create the characters to be displayed.

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