Associative storage circuit

G - Physics – 11 – C

Patent

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352/82.3

G11C 11/40 (2006.01) G11C 15/04 (2006.01) G11C 16/04 (2006.01)

Patent

CA 1046639

Abstrate An associative storage circuit characterized in that a storage cell therefor includes two circuit arms in parallel, each arm having one MNOS storage transistor and one switching transistor connected in series, and that the information which is to be written in, and the comparison information during readout, may be applied to the gates of the switching transistors, the storage transistors in one embodiment having a common gate line; in a second embodiment having individual gate controls for bit-by-bit write-in of infor- mation; and in a third embodiment, having a common gate line and a common substrate terminal line with bit-by-bit write-in by means of opposite polarity write-in potentials.

209906

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