Asymetric layout structures for transistors and methods of...

H - Electricity – 01 – L

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H01L 21/335 (2006.01) H01L 21/338 (2006.01) H01L 29/778 (2006.01) H01L 29/812 (2006.01)

Patent

CA 2585736

High power transistors are provided. The transistors include a source region (20) , a drain region (22) and a gate contact (24) . The gate contact is positioned between the source region and the drain region. First and second ohmic contacts are provided on the source and drain regions, respectively. The first and second ohmic contacts respectively define a source contact and a drain contact. The source contact and the drain contact have respective first and second widths. The first and second widths are different. Related methods of fabricating transistors are also provided.

L'invention concerne des transistors haute puissance. Ces transistors comprennent une région de source, une région de drain et un contact de grille. Le contact de grille est positionné entre la région de source et la région de drain. Un premier contact ohmique et un deuxième contact ohmique sont respectivement présents sur les régions de source et de drain. Les premier et deuxième contacts ohmiques définissent respectivement un contact de source et un contact de drain. Le contact de source et le contact de drain présentent une première et une deuxième épaisseur respectives. Les première et une deuxième épaisseurs sont différentes. L'invention concerne également des procédés de fabrication de transistors.

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