Asynchronous switching node and routing logic means for a...

H - Electricity – 04 – L

Patent

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H04L 12/56 (2006.01) H04L 12/18 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 2103287

Abstract - 49 - The routing logic means (RL) first selects, based on a route reference number included in the internal routing label (RCA,TCP) and associated to a cell to be routed by it, at least one set including a number of routing groups each of which itself includes a number of outlets. The routing logic means then secondly selects one routing group per selected set of routing groups and finally also selects from each such selected routing group an outlet to which a copy of the above mentioned cell is transferred. In this way a distribution of (copies of) cells to arbitrarily chosen output ports of a switching node including such a routing logic means can be effected both for point-to- point as for multicast connections. In a particular embodiment, the first selection is done via a routing memory (RM) whose memory locations (MSK) are addressed via the route reference number. The content of this memory location is then interpreted by a selection mean (SEL) which identifies the routing groups included in the set and performs the second selection randomly selecting any one of the groups included in the set.

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