Asynchronous transfer mode (atm) payload synchronizer

H - Electricity – 04 – L

Patent

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Details

H04L 12/54 (2006.01) H04J 3/06 (2006.01) H04L 12/56 (2006.01) H04Q 11/04 (2006.01) H04L 7/04 (2006.01)

Patent

CA 2103129

- 10 - ASYNCHRONOUS TRANSFER MODE (ATM) PAYLOAD SYNCHRONIZER Abstract The requirement of a separate payload clock in an ATM system is eliminated by increasing the number of bytes in an ATM cell and controllably generating and inserting idle cells so that a clock rate equal to that of the incoming SDH, SONET or the like clock rate may be used as a read clock. In one embodiment, the number of cells in a predetermined interval, for example 125 µ sec., is adjusted to be a predetermined integer number by inserting idle cells. This, in turn, allows the use of a "standard" available clock to delineate cell boundaries. (FIG. 1)

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