Atm cell spacer

H - Electricity – 04 – L

Patent

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Details

H04L 12/56 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 2237516

The spacer comprises a cell memory (42), means (40, 41) for allocating a theoretical emission time (TET) to each cell, means of control (41, 46) for managing the cell memory (42), with the aid of an associated pointer memory (43), in such a way that the cell memory comprises, for each virtual connection for which it contains cells, a list of locations where these cells are stored in first-in first-out mode, sorting means (41, 44) for ordering data elements each comprising a virtual connection identity and a sort key consisting of the theoretical time of emission of the cell contained in the start of list relating to said virtual connection, and for selecting at least one data element having a minimum sort key. Each cell emitted is contained in the start of list relating to a virtual connection identified in a data element selected by the sorting means.

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