G - Physics
06
F
354/232
G06F 13/40 (2006.01)
Patent
CA 1297993
BACKPLANE BUS ABSTRACT A system for communicating between a plurality of nodes in a computer, each node including logic circuitry for transmitting and receiving data. The subject system includes (1) a bus for carrying the data between the nodes, (2) a cur- rent source circuit coupled to the bus for decreasing the tran- sition time of the data transmitted onto the bus, and (3) cou- pling resistors individually coupling the bus to the driver in each node and providing impedance matching between the bus and nodes and permitting driver overlap at the bus so that higher speed and lower power dissipation occurs. In the preferred embodiment, CMOS logic circuitry is utilized and resistors are used to terminate the ends of the bus to the supply voltages.
565210
Donaldson Darrel D.
Gillett Richard B. Jr.
Digital Equipment Corporation
Donaldson Darrel D.
Gillett Richard B. Jr.
Smart & Biggar
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