Balanced current multiplier circuit for a subscriber loop...

Details Balanced current multiplier circuit for a subscriber loop... Balanced current multiplier circuit for a subscriber loop...

H - Electricity

04

M

379/67

H04M 7/00 (2006.01) H04B 1/58 (2006.01) H04M 19/00 (2006.01)

Patent

CA 1177986

BALANCED CURRENT MULTIPLIER CIRCUIT FOR A SUBSCRIBER LOOP INTERFACE CIRCUIT Abstract A balanced multiplier circuit for a subscriber loop interface circuit (SLIC) which provides both loop current to a two-wire bidirectional subscriber loop and suppression of longitudinal signals generated at the two-wire loop input to the SLIC while maintaining the midpoint load voltage at half the available power supply voltage applied to the SLIC.

408685

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