Basic pulse frame and method for a digital signal multiplex...

H - Electricity – 04 – J

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363/10

H04J 3/02 (2006.01) H04J 3/16 (2006.01)

Patent

CA 1304842

Abstract of the Disclosure A basic pulse frame is disclosed that is employable in a synchronous network for digital signals of both the CEPT hierarchy as well as of the US hierarchy while maintaining maximum transmission capacity. The synchronous payload envelope (SPE) of the basic pulse frame is composed of 9 rows (Z) and 264 columns (Sp). A configuration that is optimum for signals of the CEPT hierarchy and a configuration that is optimum for signals of the US hierarchy is achieved, each of which also allow a transmission of sufficient signals of the other type. The configuration for preferably CEPT signals comprises 16 main blocks (HBla-HBl6a) and two auxiliary blocks (ZBla, ZB2a). Both serve for the optional occupation with auxiliary signals; the second auxiliary block (ZB2a) also additionally serves for optional occupation with useful data signals. 204 bit/kbit/s CEPT signals transmitted in the synchronous payload envelope (SPEla) can be completely inserted into 34,368 kbit/s signals of the higher CEPT hierarchy level {and] 1544 kbit/s US signals transmitted in the synchronous payload envelope (SPEla) can be inserted with minimal loss of transmission capacity into 34,368 kbit/s signals of the higher CEPT hierarchy level that can follow a common 139,264 kbit/s hierarchy level. The configuration for preferably US signals contains 21 main blocks and 3 or 4 auxiliary blocks. The basic pulse frame is suitable for a world-wide digital signal multiplex hierarchy for a synchronous network.

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