G - Physics – 11 – C
Patent
G - Physics
11
C
352/82
G11C 7/00 (2006.01) G11C 11/34 (2006.01) G11C 11/4074 (2006.01) H02H 3/24 (2006.01) H02J 9/06 (2006.01)
Patent
CA 1154538
BATTERY BACKUP CIRCUIT FOR AN INTEGRATED MEMORY DEVICE ABSTRACT OF THE DISCLOSURE Backup power for the volatile cells of a memory array is provided by an auxiliary backup battery power source which is automatically connected to the memory array power input node in response to loss of power from the primary external power source. Primary operating current for the volatile cells of the memory array is conducted through a first field effect transistor switch having its gate and drain electrically connected to an external power input pin and its source electrically connected to the memory array power input node. Auxiliary operating current for the volatile cells of the memory array is provided by a second field effect transistor switch having its drain and gate electrically connected to an external control signal input pin and its source electrically connected to the memory array power input node. The first transistor switch automatically establishes a conductive path fom the external power input pin to the memory array power input node in response to the voltage of the power input pin relative to the voltage of the memory array power input node rising above the threshold voltage of the transistor, and automatically interrupts the conductive path in response to the voltage of the external power input pin relative to the voltage of the memory array power input node falling below the threshold voltage. The second transistor switch automatically establishes and interrupts a conductive path from the control signal input pin to the memory array input power input node in response to the rise and fall of voltage on the control signal input pin relative to the voltage of the memory array power input node.
351924
Kirby Eades Gale Baker
Mostek Corporation
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