Bi-polar integrated circuit structure and method of...

H - Electricity – 01 – L

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328/27, 356/30

H01L 27/04 (2006.01) H01L 27/02 (2006.01) H01L 27/082 (2006.01) H03K 19/08 (2006.01)

Patent

CA 1092722

Abstract An integrated logic circuit is formed on a layer of semi-con- ductive material of one conductive type. The first region of the opposite conductivity type is formed in the layer with no contact means formed on or in it so that no external electrical signals can be applied to the first region. A second region of the one conductivity type is formed within the first region and provides, with the first region and the layer, a vertical transistor structure. Third and fourth regions of the opposite conductivity type are formed in the layer at positions spaced away from each other and from the first region so that the layer forms the base region of both a first lateral transistor comprising the fourth and third regions, and of a second lateral transistor comprising the third and first regions. Means operable to inject current into the layer performed in the base region of both lateral transistors through the fourth region. An input circuit for applying input voltage signals to the third region to control the current distribution between the two lateral transistors and thus the current supplied to the first region is formed in the base region of the vertical transistor. An output circuit comprises the controlled current path of the vertical transistor. the vertical transistor is normally operated so that the second region acts as the collector zone. One or more further regions of the opposite conductivity type may be formed in the layer at positions spaced away from each other and from the first, third and fourth regions. Each further region has an individual further input circuit whereby a pattern of input voltage signals applied simultaneously to the third and further regions determines the base currents applying to the base of the ver- tical transistor.

287816

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