Bias circuit for fet

Details Bias circuit for fet Bias circuit for fet

H - Electricity

03

F

328/200

H03F 3/16 (2006.01) H03F 1/30 (2006.01) H03F 3/30 (2006.01)

Patent

CA 1049106

BIAS CIRCUIT FOR FET ABSTRACT OF THE DISCLOSURE A bias circuit particularly adapted for use with a field effect transistor whereby the-drain bias current of the field effect transistor is maintained constant in the event of fluctuations in the operating voltage applied to the field effect transistor by a power supply. The bias circuit changes the gate bias voltage applied to the FET as a function of the fluctuations in the operating voltage to thereby restore the drain bias current to a constant value. A variable impedance is included in the bias circuit, the variable impedance being voltage dependent such that its impedance varies as the voltage applied thereto varies in accordance with a hyperbolic relation. The voltage applied to the variable impedance is derived from, and thus includes the fluctuations in, the operating voltage. The hyperbolic relation between the impedance and the voltage applied to the variable impedance effectively matches the relation between the pinch-off voltage Vp and the amplification constant µ of the FET. -i-

239332

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