Bias circuit for fet

Details Bias circuit for fet Bias circuit for fet

H - Electricity

03

F

328/200

H03F 1/30 (2006.01) H03F 3/16 (2006.01)

Patent

CA 1283177

6446-405 ABSTRACT A bias circuit for a transistor confines errors in oper- ating current to a narrow range over a wide range of threshold voltages VT and is feasible for installation in an integrated cir- cuit. The bias circuit has a resistor connected between two power supply terminals and supplying a voltage appearing at a first divi- sion point of the resistor to a first FET as a gate bias. A second division point is provided on the resistor and a second FET has its drain or source connected to the second division point. The gate voltage of the second FET is connected to a predetermined potential point.

515761

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