H - Electricity – 03 – K
Patent
H - Electricity
03
K
H03K 19/017 (2006.01) H01L 27/118 (2006.01)
Patent
CA 2173034
Disclosed is a BiMOS integrated circuit, which has: a bipolar transistor for output pull-up; a BiMOS hybrid gate buffer section which comprises a MOS transistor for output pull-down which is longitudinally connected to the bipolar transistor, and a MOS transistor for base drive which comprises an output which is connected a base of the bipolar transistor to drive the base and a gate which is connected to an input; and a logical section which comprises at least a CMOS gate, the logical section having an output which is connected to the input; wherein the base drive MOS transistor has an input capacitance less than that of the output pull-down MOS transistor.
Corporation Nec
G. Ronald Bell & Associates
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