Binary input/output processing in a digital computer

G - Physics – 06 – F

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354/230.2

G06F 9/00 (2006.01) F02D 41/24 (2006.01) G06F 7/24 (2006.01) G06F 7/78 (2006.01) G06F 13/20 (2006.01)

Patent

CA 1141037

- 18 - ABSTRACT A digital computer has a master clock for generating master clock pulses at a first frequency and has a counter for counting secondary clock pulses having a frequency less than the frequency of the master clock pulses. The secondary clock pulses are counted and used in the assignment of real times to bytes of input data, and in the comparison of real times with desired output times assigned to binary output data. The input data preferably is placed in a FIFO stack and the output data in a self-sorting stack. The sorting in the output stack occurs between changes in count in the counter con- taining the secondary clock pulses.

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