G - Physics – 06 – F
Patent
G - Physics
06
F
354/236.6
G06F 3/00 (2006.01) F02D 41/24 (2006.01) G06F 7/22 (2006.01) G06F 7/78 (2006.01) G06F 13/20 (2006.01)
Patent
CA 1162654
- 18 - ABSTRACT A digital computer having a real time counter and a memory/address bus uses binary input data comprising a plurality of bits of information to generate output infor- mation in response to a program. The invention provides im- proved processing of the binary input data. A transition from one state to another of one or more of the bits of binary input data causes a byte of binary input data containing the bit or bits having undergone transition to be placed in an input holding register. Also, the real time at which the transition occurred is placed in a capture-time holding regis- ter. The contents of the input holding and capture-time holding registers are repetitively placed in a stack as pending input data bytes. The pending input data bytes are accessible to the computer central processing unit, as re- quired by the program, via the memory/address bus.
353109
Edelman Brian S.
Robinson Ralph L.
Ford Motor Company Of Canada Limited
Sim & Mcburney
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