Binary signal receiver for time compression multiplexing

Details Binary signal receiver for time compression multiplexing Binary signal receiver for time compression multiplexing

H - Electricity

04

J

363/10

H04J 3/00 (2006.01) H04L 5/14 (2006.01) H04L 25/06 (2006.01)

Patent

CA 1178721

BINARY SIGNAL RECEIVER FOR TIME COMPRESSION MULTIPLEXING Abstract of the Disclosure A receive circuit for binary signals in time compression multiplexing systems mitigates effects of the local data decay tail and zero line wander by means of a sample-and-hold circuit, having a fast attach and a decay time constant equal to a combination of the transmission line, and dc blocking device time constants followed by a subtracting difference amplifier. Power feed of the line via dc blocking capacitors is thus possible. Also higher receiver gain is possible when sampling switch is left on during local data transmission without receiver instability. -i-

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