G - Physics – 06 – F
Patent
G - Physics
06
F
354/204
G06F 7/50 (2006.01)
Patent
CA 1252897
RCA 80,990 Abstract A binary subtracter stage for subtracting single bit binary numbers includes a first exclusive OR gate to which the numbers to be subtracted are applied. The output of the exclusive OR gate is connected to one input of a second exclusive OR gate which has a second input connected to a borrow input signal. The output of the second exclusive OR gate provides the difference between the single bit binary numbers. A borrow output signal is generated with the combination of a pass transistor coupled between the borrow input and borrow output terminals and a three state logic circuit which has its output terminal connected to the borrow output terminal. The pass transistor is controlled by the output of the first exclusive OR gate and the three state logic circuit is controlled by the single bit binary numbers to be subtracted.
496874
Eckersley Raymond A.
Rca Corporation
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