Bit error rate estimation

H - Electricity – 04 – L

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Details

H04L 1/00 (2006.01) H04L 1/20 (2006.01)

Patent

CA 2116735

The bit error rate (BER) estimation process (100) of the present invention receives (104) encoded data over a channel, decodes (130, 140, 107, 108) the data, and estimates (190, 191) the number of errors induced by the channel. The process (100) of the present invention requires reduced processing time by the processor (191) thereby reducing the power requirements of the processor (191).

La présente invention est un processus d'estimation (100) du taux d'erreur sur les bits dans lequel des données codées sont reçues (104) sur un canal. Le processus de l'invention (100) décode ces données (130, 140, 107, 108) et estime (190, 191) le nombre des erreurs produites par le canal en cause. Il réduit le temps de traitement par le processeur (191), ce qui réduit la consommation d'énergie de ce dernier.

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