Bit storage cell

Details Bit storage cell Bit storage cell

G - Physics

11

C

G11C 11/21 (2006.01) G06F 7/57 (2006.01) G06F 9/302 (2006.01) G06F 9/44 (2006.01) G11C 11/40 (2006.01) G11C 11/419 (2006.01) G11C 15/04 (2006.01)

Patent

CA 2087023

2087023 9202933 PCTABS00010 The invention relates to a very fast memory bit cell for implementation in VLSI technics. Many bit cells could be packed very dense. The bit cell includes: a cell circuit (T1, T2, L1, L2, D1, D2; T1, T2, I1, I2, D1, D2) in which a bit value is storable, said value being either 'true' or 'false'; a first connection (Vcc) which is constantly provided with a supply voltage, a second, a third and a fourth connection (acc, d, d*) each of which is settable in different control states; said cell circuit being such that each combination of said control states on said second, third and fourth connection is setting said memory bit cell in an individual among a set of functional states.

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