Bit synchronization arrangement for a data modem or data...

H - Electricity – 04 – L

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H04L 7/00 (2006.01) H03K 4/06 (2006.01) H04L 7/033 (2006.01)

Patent

CA 1214236

28 ABSTRACT: Bit synchronization arrangement for a data modem or data receiver. In an asynchronous transmission mode, the bit synchronization arrangement receives data signals in the form of binary pulse trains (at A). It comprises an oscillator (3) whose output signal (at C) has a frequency Fos approximately equal to twice the binary rate of the pulse trains and a transition detector (1, 22) which supplies a calibrated voltage pulse (at B2) at each data signal transition. According to the invention, the oscillator supplies a triangular internal signal (at D) at the frequency Fos and phase correction means (2) are provided to reduce the algebraic value of the slope of this signal during each calibrated pulse so as to produce a predetermined constant advancing or delaying phase shift according as the calibrated pulse occurs during a negative or a positive ramp of this signal. Application: Data receivers for low-speed voice band data transmission. Reference : Figure 1.

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