H - Electricity – 03 – K
Patent
H - Electricity
03
K
352/82.24
H03K 19/096 (2006.01) G11C 8/08 (2006.01) G11C 8/10 (2006.01) G11C 8/18 (2006.01)
Patent
CA 1238717
YO984-098 BOOST WORD-LINE CLOCK AND DECODER-DRIVER CIRCUITS IN SEMICONDUCTOR MEMORIES ABSTRACT OF DISCLOSURE A CMOS boost word-line clock and decoder-driver circuit which can be used for CMOS DRAM's with substrate bias in addition to VDD supply. A boost word-line clock circuit including simple CMOS inverters are used for the word-line boost and the possible voltage overshoot, which usually occurs because of capacitor two way boost, can be completely eliminated. Also, the circuit can be triggered by a single clock. A high performance decoder circuit is provided in combination with the aforesaid CMOS boost word-line clock circuit, such decoder using NMOS pass-gate in the decoder driver and providing fast word-line boosting. The timing between the decoder and the word-line clock activation is not crucial. In order to boost the word-line below O V, a negative substrate bias is provided which avoids the junction forward-biasing-due to voltage undershoot below O V at NMOS source or drain, thus simplifying the design and speeding up the word-line clock pull-down when compared to the word-line boost clock circuit without using the substrate bias.
502801
Chao Hu H.
Lu Nicky C.
International Business Machines Corporation
Rosen Arnold
LandOfFree
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