Boundary-scan-based system and method for test and diagnosis

G - Physics – 01 – R

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G01R 31/28 (2006.01) G01R 31/3185 (2006.01) G06F 11/273 (2006.01)

Patent

CA 2127612

A system (10) for testing one or more circuit boards (12 1-12n), each containing at least one chain of Boundary-Scan cells (14 1-14p), includes a system test and diagnosis host (16) for managing overall testing of the system formed by the circuit boards. A Boundary-Scan Virtual Machine (BVM) (17) is operative to receive an initiate test command from the system test and diagnosis host independent of thenumber and nature of the boards to be tested. In response to the test command, the BVM (17) causes each circuit board to execute a test program (23) specific thereto to determine the errors, if any, in the board. The errors from each board are passed back to the BVM (17) which, in turn, interprets the errors to yield test information, indicative of the operation of the boards, which is then passed back to the system test and diagnosis host (16).

L'invention est un système (10) servant à tester une ou plusieurs cartes de circuit (12 1-12 n) contenant chacune au moins une chaîne de cellules de test périphérique (14 1-14 p) qui comprend un hôte de test et de diagnostic (16) servant à gérer la vérification de l'ensemble formé par les cartes de circuit. Une machine virtuelle de test périphérique (17) reçoit une commande d'amorçage de test de l'hôte de test et de diagnostic indépendamment du nombre et de la nature des cartes à tester. En réponse à cette commande, cette machine virtuelle (17) fait exécuter un programme de test (23) particulier par chaque carte de circuit pour en détecter les défaillances. Les erreurs détectées sur chacune des cartes sont transmises à la machine virtuelle (17) qui les interprète pour produire une information de test représentative de l'état de fonctionnement des cartes qui est ensuite transmise à l'hôte de test et de diagnostic (16).

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