Boundary scan system with address dependent instructions

Details Boundary scan system with address dependent instructions Boundary scan system with address dependent instructions

G - Physics

01

R

G01R 31/28 (2006.01) G01R 31/3185 (2006.01)

Patent

CA 2309144

Boundary scan integrated circuits are provided with a plurality of new registers (56, 61, 62, 65, 67) between two dedicated pins, Test Data In (TDI) (16) and Test Data Out (TDO) (18) pins. The registers include an address register (56) and a plurality of test data registers (61, 62, 65, 66, 67) which are addressed by the address register using address instructions in the (IR) (23). Instructions for the addressable registers may be steered to the correct register with an ADDLOAD instructions placed in the (IR) followed by an address-dependent register active between the (TDI) and (TDO) pins. Any instruction from a set of address-dependent instructions may be steered to any register handling address dependent instructions allowing a small number of instructions to be used in a large number of addressable data registers. Non- addressable registers, such as the boundary scan registers (54), use address- independent instructions.

L'invention concerne des circuits intégrés de type Boundary Scan pourvus d'une pluralité de nouveaux registres (56, 61, 62, 65, 67) entre deux broches dédiées, à savoir les broches Entrée de données de test (TDI) (16) et Sortie de données de test (TDO) (18). Les registres comprennent un registre d'adresse (56) et une pluralité de registres (61, 62, 65, 66, 67) de données de test désignés par le registre d'adresse, au moyen des instructions d'adressage du registre d'instructions (23). Les instructions destinées aux registres adressables peuvent être dirigées vers le registre approprié au moyen d'une instruction ADDLOAD placée dans le registre d'instructions, suivie d'un registre lié aux adresses actif entre les broches (TDI) et (TDO). N'importe quelle instruction parmi un ensemble d'instructions liées aux adresses peut être dirigée vers un registre quelconque de traitement des instructions, ce qui permet d'utiliser un nombre réduit d'instructions dans un grand nombre de registres de données adressables. Les registres non adressables, tels que les registres (54) de type Boundary Scan, utilisent des instructions non liées aux adresses.

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