G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 13/14 (2006.01) G06F 13/40 (2006.01)
Patent
CA 2162187
A computer system having an ISA bus and a PCI bus is provided with a PCI to ISA bridge having certain imbedded functions performed by PCI slaves on the bridge. In order to implement the bridge in slow CMOS technology, the PCI control signals are latched on the bridge. Since the PCI slaves on the bridge cannot respond with control signals on the PCI bus fast enough to satisfy the PCI bus protocol due to this latching, a logic device is provided on the bridge. The logic device monitors the unlatched master-slave control signals carried on the PCI bus, and in appropriate situations, drives the control signals on the PCI bus (within the time specified by the PCI bus protocol) that the PCI slaves would normally drive but are unable to within the time necessary to meet the PCI bus protocol.
Cronin Daniel R. III
Katz Sagi
Kulik Amy
Wall William Alan
International Business Machines Corporation
Rosen Arnold
LandOfFree
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