Buffer circuitry

H - Electricity – 03 – K

Patent

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328/196

H03K 17/56 (2006.01) H03K 19/0185 (2006.01)

Patent

CA 1157919

BUFFER CIRCUITRY Abstract: A buffer circuit comprising pull-up and pull-down switching devices gives a digital output signal in response to a digital input. Signal waveforms are applied to the circuit to pre-bias the output terminal to the "1" potential level. This permits the pull-up device to be of relatively high resistance, while the pull-down device is of low resistance. The disclosed cycle of operation conserves power, and the use of a high-resistance pull-up device permits savings in semiconductor chip area.

365631

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