G - Physics – 06 – F
Patent
G - Physics
06
F
354/234
G06F 13/20 (2006.01) G06F 13/36 (2006.01)
Patent
CA 1238981
ABSTRACT A data processing system having a main processing unit, a memory subsystem, and a co-processor selec- tively connectable to said memory subsystem through an Input/Output Channel Controller which includes a control means for arbitratinq access to the I/O Bus among the co-processor and the other I/O devices connected to the Bus. Since the co-processor runs programs stored in the memory subsystem, there is a tendency for the co-processor to monopolize the bus with instruction fetch cycles, thereby excluding other I/O devices from access to the bus. The control means for arbitrating responds to requests on the basis of a linear priority scheme in which the co-processor has the lowest priority. Each device, except the co-processor, is permitted to keep control of the bus until it voluntarily relinquishes it. The co-processor, on the other hand, relinquishes control of the bus in response to a request for access by any higher operator. However, control is returned auto- matically to the co-processor in the absence of any other request, since the co-processor continually raises its access request line.
495485
International Business Machines Corporation
Kerr Alexander
LandOfFree
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